TSEA22 · 6 credits · Basic level (G1N) · Datateknik, Elektroteknik
Switching Theory and Logical Design
Discontinued · replaced by TSEA53
90%
passed the latest ordinary exam
TEN1 · 25 Mar 2025 · 115 students
84%
passed the ordinary exams, all sittings over the last 5 years
TEN1 · 441 students
24%
Harder than 24% of courses at basic level
Compared with 874 courses at the same level, ordinary exams over the last three academic years. 115 students.
Part of 3 programmes
Exam
TEN1 Written examination
- 5
- 4
- 3
- U
Ordinary exams
84% passed · 441 students
- 90%115
- 81%122
- 84%115
- 79%89
Re-exams
62% passed · 122 students
- 60%5
- 76%17
- 78%9
- 66%29
- 55%11
- 59%22
- 43%7
- 55%22
- Pass the re-exam: 62% (122 students), compared with 84% (441 students) on the ordinary exam
- Get 4 or 5: 44% (563 students)
Show small sittings (3)
Sittings with fewer than 5 students, often credit transfers or special sittings. They are not part of any figure on this page.
- 67%3
- 50%4
- 50%2
Other modules
Partial exams, hand-ins and labs. They are not part of the figures at the top.
Hand-in or lab
LAB1 Laboratory work
- G
Main rounds
100% passed · 441 students
- 100%116
- 100%116
- 100%115
- 100%94
Later rounds
No sittings with at least 5 students.
Show small sittings (11)
Sittings with fewer than 5 students, often credit transfers or special sittings. They are not part of any figure on this page.
- 100%3
- 100%1
- 100%1
- 100%2
- 100%1
- 100%1
- 100%1
- 100%3
- 100%1
- 100%1
- 100%3
About the course
Aim
The purpose of the course is to provide a theoretical and practical basis for the construction and troubleshooting of digital systems. After completing the course, the student should be able to:
- translate a problem statement into a theoretical model for digital circuits
- apply structured methods for the analysis and synthesis of digital circuits
- translate a design into functioning hardware
- verify the hardware against the original problem description
Content
Lectures, lessons and laboratory work cover:
- Number systems, conversions and codes
- Boolean algebra, XOR
- Combinational circuits: minimization, Karnaugh maps, NAND- and NOR-networks, tri-state, buses, incompletely specified networks, multiple-output networks
- Combinational components: adders. comparators, decoders, demultiplexers, multiplexers
- Memories, programmable Logic
- Sequential networks, state graphs, Mealy- and Moore-networks, equivalent states
- Synthesis with data flip-flops, asynchronous signals to synchronous networks, initialisation
- Synthesis with counters and shift registers
- Modelling in VHDL, simulation and synthesis of VHDL
- Examiner
- Anders Nilsson
- Scheduled hours
- 60 h
- Main field of study
- Datateknik, Elektroteknik